Introspect DP/EDP Pattern Generator可任意调节DP/eDP的各种参数/码型，支持最新的PSR/PSR2/ALPM等功能验证，覆盖DP/eDP协议物理层至协议层的产品测试验证，包含：抖动、Skew、电压幅值、时序以及协议功能性验证等等.

是目前全球各大主流的SoC，DDIC等厂商用于DP/EDP接口测试验证的首选方案。

Overview:

The SV5C-eDP Embedded DisplayPort Generator is an ultra-portable, high-performance instrument capable of generating traffic for Embedded DisplayPort and DisplayPort applications at data rates of up to 8.1 Gbps. The SV5C-eDP Generator provides analog parameter controls that enable DisplayPort receiver stress-testing and allow for deep insights into voltage and timing sensitivities of DisplayPort sink devices. The instrument operates with the award-winning Introspect ESP Software environment which includes full pattern synthesis tools for generating test patterns and video frames for system-level test.

Figure 1 below illustrates a typical application of the SV5C-eDP Generator in an Embedded DisplayPort system.

Key Features:

• Protocol: supports Embedded DisplayPort (eDP) up to v1.4 and Display Port (DP) up to v1.4

• Supported Data Rates: up to 8.1 Gbps with a fully continuous range of data rates

• Lane Count: configurable from 1 to 4 lanes per port plus Auxiliary Channel

• Analog Controls: voltage amplitude and common mode voltage, each per lane

• Signal Impairments: jitter injection, sinusoidal voltage noise injection, per-wire timing skew

• Pattern Generation: full video frame generation with 2 GBytes of pattern memory